SLE 5542
Product Details | |
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Place of Origin: | China |
Packing: | 250 pcs/box, 2500 pcs/carton. |
Weight: | 14kg per carton. |
Carton Size: | 20×25×50 cm |
MOQ: | 1000 Piece/Pieces |
Payment Terms: | T/T, Paypal |
Fob Port: | Shenzhen |
Category: Contact IC Card
Description
SLE 5542
Physical Specification of ISO / IEC 7810, 7816 Compliant ISO Card (Thin Card)
- Dimension: L86×W54×T0.76 (+/- 0.04)mm
- Weight: 5.8g+/-0.5g
- Standard Color: White
Printing Method
- Offset, Silkscreen, Silver or Gold Glittering Effect, UV Printing
Number Printing Options
- Thermal Transfer Number, Ink Jet Number, Laser Number, Embossing Number
Material Options
- PVC
Surface Options
- Glossy, Matt
Magnetic Stripe Options
- Loco 300Oe, 350Oe
- Hico 650Oe, 2750Oe, 4000Oe
Other Available Options
- Chip Encoding, Signature Panel, Hole Punching
- PVC Card with Overlay, Peel Off Protection Film
Chip Available at 125KHz
- EM4100 / H4100, EM4200 / H4200 EM4102 / H4102, TK4100
- EM4105, EM4305, EM4469, EM4450
- T5557 / T5567 / ATA5567, Hitag1, Hitag2, HitagS
Chip Available at 13.56MHz
- ISO / IEC 14443 A
- Mifare 1K S50 / MF1 S50, Mifare 4K S70 / MF1 S70,
- Mifare 1K-Compatible, Mifare Ultralight, Mifare DesFire
- ISO / IEC 14443 A
- ISO / IEC 14443 B
- ST SR176, SRI512, SRIS4K
- ISO / IEC 14443 B
- ISO / IEC 15693
- I.CODE SLI SI2 / I.CODE 2, I.CODE 1, LRIS2K, LRI64
- ISO / IEC 15693
- Dual Standard Compliant of ISO/IEC 14443 and ISO/IEC 15693
- INSIDE Picopass 32KS
- Dual Standard Compliant of ISO/IEC 14443 and ISO/IEC 15693
- Tag-IT Ti2048, Tag-IT Ti256, INSIDE 2K, Legic256
Chip Available at 860~960MHz
- ISO 18000-6B
- NXP UCODE HSL
- NXP UCODE EPC V1.19
- ISO 18000-6B
- ISO 18000-6C
- NXP UCODE EPC Gen 2
- XRA000
- XRA Gen 2
- ATA5590
- IMPINJ Monza
- ISO 18000-6C
SLE 5542 Features
- 100% functional compatibility to SLE 4442
- 256 x 8 bit EEPROM organization of Data Memory
- 32 x 1 bit Protection Memory
- Byte-wise write protection of first 32 addresses (byte 0…31) of Data Memory
- Manufacturer Code for unique identification of application
- Data Memory (addresses 0
255) alterable only after verification of 3-Byte
Programmable Security Code (PSC) - Two-wire link protocol
- Byte-wise addressing
- End of processing indicated at data output
- Data Memory (addresses 0
255) alterable only after verification of 3-Byte
- Contact configuration and Answer-to-Reset (synchronous transmission) in accordance to standard ISO/IEC 7816
- Sophisticated electrical characteristics
- Ambient temperature 40 +80°C for chip, 25 +80°C for module
- Supply voltage 5 V ± 10 %
- Supply current < 3 mA (typical 600 µA)
- EEPROM erase / write time 5 ms
- ESD protection typical 4,000 V
- EEPROM Endurance minimum 100,000 erase / write cycles)
- Data retention for minimum of 10 years)
- Advanced 1.2 µm CMOS-technology optimised for security layout
- EEPROM-cells protected by shield
- Shielding of deeper layers via metal
- Sensory and logical security functions
- No isolation on backside necessary
- Advanced 1.2 µm CMOS-technology optimised for security layout
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